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Influence of plasma etching on yield of LOGIC Integrated circuit in plasma equipment

  • Categories:Company Dynamics
  • Author:plasma cleaning machine-surface treatment equipment-CRF plasma machine-Sing Fung Intelligent Manufacturing
  • Origin:
  • Time of issue:2020-11-19
  • Views:

(Summary description)Every step from design and manufacturing to packaging is critical for the chip to perform the desired function. As the size of integrated circuits continues to shrink, the timing window of transistors continues to shrink. In the manufacture of advanced process logic integrated circuit, the process fluctuation has more and more influence on the working timing window of transistors, so the manufacturability of chips must be considered in the design of chips. When the completed layout is put into the factory, it is necessary to check it first, look for the graphics that will bring difficulties or make it impossible to produce and make reasonable adjustments. When it comes to the manufacturing stage, the yield of the chip will rise quickly for the mature complete process, and even the yield of the chip can reach the standard in a single stream. But for processes in development, yield increases can be a long process, spanning several quarters or even longer. The following introduces the concept of yield in logic IC manufacturing and the process of yield improvement, and discusses the key role of plasma etching process on yield improvement in plasma equipment.   Every link in semiconductor manufacturing may cause product failure. The manufacturing plant typically goes through hundreds of processes from the time a wafer is rolled off the production line to the time it is completed. The manufacturing plant is concerned with how many grains on a wafer meet the shipping requirements. Yield is an indicator to quantify this ability. For example, a wafer that has 1,000 grains and 900 grains that pass the electrical property test has a yield of 90%. The yield of 25 wafers in the same lot may vary due to subtle differences in location, order, etc., but there is generally no significant difference. Yield can also fluctuate with the time drift of machine parameters on the production line, and sometimes a large deviation or excursion can lead to a sudden fall of yield. Long-term stability at a high level of yield is a sign of a mature production line.   The device failure caused by process can be divided into parametric and functional failure according to the failure characteristics. Parametric failure refers to the device electrical parameter optimization and can not meet the design requirements, such as chip working frequency measurement under the rated working voltage is too low, when static beyond the rated power consumption, etc., traditionally called soft failure (soft fail), functional failure refers to the device function is lost, can't detect some electrical parameters, such as memory read/write failure, the result of logic circuit error, etc., traditionally called hard failure (hard fail).   Parametric failure is mainly related to the physical parameters of the device, such as gate size, active region size, active region doping concentration, etc. Etching is to define the device size, thickness, appearance, the key technology to the influence of parametric failure is very big, such as inadequate because the machine maintenance and prompted a large grid size deviation, tends to yield loss, functional failure are often caused by the flaws of the wafer, defects including physical on the wafer foreign bodies, chemical pollution, graphics, defects and lattice defects, etc. As a key process in semiconductor manufacturing, plasma etching in plasma equipment also has a great impact on functional failure. For example, the particles dropped from the reaction chamber on the wafer surface caused the etching to be blocked, and the insufficient etching time caused the through-hole and the sublayer metal to break up, etc. It can be seen from this that the yield improvement of LOGICAL integrated circuit can be divided into two parts: one is that the device department selects reasonable device parameters through experiments; the other is that the process department optimizes and solves various defects in the whole process; and the process integration department integrates the work of the above two parts to achieve the goal.

Influence of plasma etching on yield of LOGIC Integrated circuit in plasma equipment

(Summary description)Every step from design and manufacturing to packaging is critical for the chip to perform the desired function. As the size of integrated circuits continues to shrink, the timing window of transistors continues to shrink. In the manufacture of advanced process logic integrated circuit, the process fluctuation has more and more influence on the working timing window of transistors, so the manufacturability of chips must be considered in the design of chips. When the completed layout is put into the factory, it is necessary to check it first, look for the graphics that will bring difficulties or make it impossible to produce and make reasonable adjustments. When it comes to the manufacturing stage, the yield of the chip will rise quickly for the mature complete process, and even the yield of the chip can reach the standard in a single stream. But for processes in development, yield increases can be a long process, spanning several quarters or even longer. The following introduces the concept of yield in logic IC manufacturing and the process of yield improvement, and discusses the key role of plasma etching process on yield improvement in plasma equipment.

 

Every link in semiconductor manufacturing may cause product failure. The manufacturing plant typically goes through hundreds of processes from the time a wafer is rolled off the production line to the time it is completed. The manufacturing plant is concerned with how many grains on a wafer meet the shipping requirements. Yield is an indicator to quantify this ability. For example, a wafer that has 1,000 grains and 900 grains that pass the electrical property test has a yield of 90%. The yield of 25 wafers in the same lot may vary due to subtle differences in location, order, etc., but there is generally no significant difference. Yield can also fluctuate with the time drift of machine parameters on the production line, and sometimes a large deviation or excursion can lead to a sudden fall of yield. Long-term stability at a high level of yield is a sign of a mature production line.

 

The device failure caused by process can be divided into parametric and functional failure according to the failure characteristics. Parametric failure refers to the device electrical parameter optimization and can not meet the design requirements, such as chip working frequency measurement under the rated working voltage is too low, when static beyond the rated power consumption, etc., traditionally called soft failure (soft fail), functional failure refers to the device function is lost, can't detect some electrical parameters, such as memory read/write failure, the result of logic circuit error, etc., traditionally called hard failure (hard fail).

 

Parametric failure is mainly related to the physical parameters of the device, such as gate size, active region size, active region doping concentration, etc. Etching is to define the device size, thickness, appearance, the key technology to the influence of parametric failure is very big, such as inadequate because the machine maintenance and prompted a large grid size deviation, tends to yield loss, functional failure are often caused by the flaws of the wafer, defects including physical on the wafer foreign bodies, chemical pollution, graphics, defects and lattice defects, etc. As a key process in semiconductor manufacturing, plasma etching in plasma equipment also has a great impact on functional failure. For example, the particles dropped from the reaction chamber on the wafer surface caused the etching to be blocked, and the insufficient etching time caused the through-hole and the sublayer metal to break up, etc. It can be seen from this that the yield improvement of LOGICAL integrated circuit can be divided into two parts: one is that the device department selects reasonable device parameters through experiments; the other is that the process department optimizes and solves various defects in the whole process; and the process integration department integrates the work of the above two parts to achieve the goal.


  • Categories:Company Dynamics
  • Author:plasma cleaning machine-surface treatment equipment-CRF plasma machine-Sing Fung Intelligent Manufacturing
  • Origin:
  • Time of issue:2020-11-19 08:52
  • Views:
Information

Influence of plasma etching on yield of LOGIC Integrated circuit in plasma equipment:

 

Every step from design and manufacturing to packaging is critical for the chip to perform the desired function. As the size of integrated circuits continues to shrink, the timing window of transistors continues to shrink. In the manufacture of advanced process logic integrated circuit, the process fluctuation has more and more influence on the working timing window of transistors, so the manufacturability of chips must be considered in the design of chips. When the completed layout is put into the factory, it is necessary to check it first, look for the graphics that will bring difficulties or make it impossible to produce and make reasonable adjustments. When it comes to the manufacturing stage, the yield of the chip will rise quickly for the mature complete process, and even the yield of the chip can reach the standard in a single stream. But for processes in development, yield increases can be a long process, spanning several quarters or even longer. The following introduces the concept of yield in logic IC manufacturing and the process of yield improvement, and discusses the key role of plasma etching process on yield improvement in plasma equipment.

 

Every link in semiconductor manufacturing may cause product failure. The manufacturing plant typically goes through hundreds of processes from the time a wafer is rolled off the production line to the time it is completed. The manufacturing plant is concerned with how many grains on a wafer meet the shipping requirements. Yield is an indicator to quantify this ability. For example, a wafer that has 1,000 grains and 900 grains that pass the electrical property test has a yield of 90%. The yield of 25 wafers in the same lot may vary due to subtle differences in location, order, etc., but there is generally no significant difference. Yield can also fluctuate with the time drift of machine parameters on the production line, and sometimes a large deviation or excursion can lead to a sudden fall of yield. Long-term stability at a high level of yield is a sign of a mature production line.

 

The device failure caused by process can be divided into parametric and functional failure according to the failure characteristics. Parametric failure refers to the device electrical parameter optimization and can not meet the design requirements, such as chip working frequency measurement under the rated working voltage is too low, when static beyond the rated power consumption, etc., traditionally called soft failure (soft fail), functional failure refers to the device function is lost, can't detect some electrical parameters, such as memory read/write failure, the result of logic circuit error, etc., traditionally called hard failure (hard fail).

 

Parametric failure is mainly related to the physical parameters of the device, such as gate size, active region size, active region doping concentration, etc. Etching is to define the device size, thickness, appearance, the key technology to the influence of parametric failure is very big, such as inadequate because the machine maintenance and prompted a large grid size deviation, tends to yield loss, functional failure are often caused by the flaws of the wafer, defects including physical on the wafer foreign bodies, chemical pollution, graphics, defects and lattice defects, etc. As a key process in semiconductor manufacturing, plasma etching in plasma equipment also has a great impact on functional failure. For example, the particles dropped from the reaction chamber on the wafer surface caused the etching to be blocked, and the insufficient etching time caused the through-hole and the sublayer metal to break up, etc. It can be seen from this that the yield improvement of LOGICAL integrated circuit can be divided into two parts: one is that the device department selects reasonable device parameters through experiments; the other is that the process department optimizes and solves various defects in the whole process; and the process integration department integrates the work of the above two parts to achieve the goal.

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